Abstract: This paper designs and implements a variable voltage threshold generation and regulation circuit in the global foundries (GF) 0.18 μm CMOS technology, including the DAC module and the control module based on the SPI module interface. The circuit is an important part of the readout ASIC chip. In order to effectively reduce the layout area of ASIC chip, reduce power consumption, and improve the adjustment accuracy, it is proposed to realize the threshold adjustment of an 8-bit DAC by combining high and low 4-bit DACs, in which multiple channels share a high 4-bit DAC for coarse threshold tuning, and each channel contains a low 4-bit DAC for fine threshold tuning. The SPI slow control interface module not only controls the input of 8-bit DAC to adjust the trigger threshold, but also controls the gain of the preamplifier and the shaping time. The overall layout size of the chip is 800 μm×1000 μm. The results of laboratory electronics performance tests show that the DNL of DAC is less than 0.10LSB, and the INL is less than 0.18LSB, Also, the coarse adjustment range of the threshold is about 900 mV, and the fine threshold adjustment is about 60 mV, the accuracy error is less than 7%, which can meet the requirements of threshold adjustment of discriminator in ASIC chip.