以2n-1,2n,2n+1为基的余数系统2n高性能缩放

High Efficient 2n Scaling for RNS 2n-1,2n,2n+1

  • 摘要: 数值缩放(scaling)的高效VLSI实现是基于余数系统(RNS)的DSP系统的关键问题之一。该文提出了有符号余数系统数值缩放通用算法,并结合基为2n-1,2n,2n+1的余数系统特性提出了其优化的2nn缩放算法和VLSI实现结构,明确给出了在进行有符号RNS整数缩放时负数情况下所引入的修正常量计算方法。分析表明该方法较级联n个1bit缩放模块实现余数系统22n缩放具有更好的速度、面积和功耗特性,从而易于实现基于RNS的DSP系统。

     

    Abstract: The high efficient very large scale integration (VSLI) implementation of scaling operation for residue number system (RNS) plays an important role in RNS-based digital signal processing (DSP) systems. In this paper, the general algorithm for scaling a positive number in RNS is presented firstly. With the properties of moduli set 2n-1, 2n, 2n+1 and based on the proposed scaling algorithm, an efficient 2n scaling scheme for this moduli set is proposed. Furthermore, the correction factor for negative numbers scaling is also presented. The analysis result shows that the proposed scaler has higher area and power consumption performances compared with the cascaded scaling scheme. The scaler can be used in the design of RNS-based DSP systems.

     

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