Design and process preparation of a giant magneto-resistive isolator

To ensure the complete and high-speed transmission of signals, electrical isolation between electronic systems is indispensable. This paper first prepared a pinned spin valve giant magnetoresistive (GMR) thin film with the structure Sub(Si/SiO₂)(300 nm)/Ta(5 nm)/NiFe(4.5 nm)/CoFe(1.5 nm)/Cu(2.5 nm)/CoFe(5.5 nm)/IrMn(10 nm)/Ta(5 nm) using magnetron sputtering. Based on the preparation of the thin film, a GMR isolator was fabricated through semiconductor processes such as photolithography, ion beam (IBE) etching, and metal stripping. A SiO₂ isolation gate with a thickness of 4 μm was grown by plasma enhanced chemical vapor deposition (PECVD), which can withstand a voltage of up to 2 kV. Wafer-level testing was performed using a Keithley multifunction probe stage, and the output voltage of the giant magnetoresistive isolator was about 20 mV when the input current of the planar coil was 6 mA. Circuit-level testing was performed after slicing the wafers for leads, and the giant magnetoresistive isolator was operated at a frequency of 25 MHz. The entire process requires six photolithographic steps, and the process parameters are stable, providing reference value for the preparation of GMR isolators.