低噪声CMOS电荷敏放大器设计与研制

于奇, 杨谟华, 李竞春, 王向展, 肖海燕

于奇, 杨谟华, 李竞春, 王向展, 肖海燕. 低噪声CMOS电荷敏放大器设计与研制[J]. 电子科技大学学报, 2003, 32(2): 146-148,163.
引用本文: 于奇, 杨谟华, 李竞春, 王向展, 肖海燕. 低噪声CMOS电荷敏放大器设计与研制[J]. 电子科技大学学报, 2003, 32(2): 146-148,163.
Yu Qi, Yang Mohua, Li Jingchun, Wang Xiangzhan, Xiao Haiyan. Design and Fabrication of a Low-Noise CMOS Charge Sensitive Amplifier[J]. Journal of University of Electronic Science and Technology of China, 2003, 32(2): 146-148,163.
Citation: Yu Qi, Yang Mohua, Li Jingchun, Wang Xiangzhan, Xiao Haiyan. Design and Fabrication of a Low-Noise CMOS Charge Sensitive Amplifier[J]. Journal of University of Electronic Science and Technology of China, 2003, 32(2): 146-148,163.

低噪声CMOS电荷敏放大器设计与研制

基金项目: 

国家自然科学基金资助项目,编号:60072004

详细信息
    作者简介:

    于奇 男 29岁 硕士 讲师 主要从事超深亚微米数模混合信号集成电路/系统设计技术方面的研究

  • 中图分类号: TN431.1

Design and Fabrication of a Low-Noise CMOS Charge Sensitive Amplifier

Funds: 

The Project is supported by the Natural Science Foundation of China, No: 60072004

  • 摘要: 提出了一种新的低噪声低功耗电荷敏感放大器设计方案。用EDA软件Cadence进行模拟,得到了满意的仿真结果:直流开环增益为82.9 dB,f-3dB为28 kHz,相位裕度为46.9°,低频下输出噪声频谱密度为1.5μV/Hz2。采用标准的3 mm P阱CMOS工艺进行了流片,测试结果与模拟情况相近。
    Abstract: A new design of low-noise low-power consumption charge sensitive amplifier is presented. Simulated by EDA software Cadence, the results obtained are satisfied. The DC open-loop gain is 82.9 dB with a 28 kHz -3 dB bandwidth and its phase margin is 46.9°. The maximum output noise spectral density is 1.5 μV/Hz2 at very low frequency. Using standard 3mm P-Well CMOS technology, the proposed amplifier is fabricated, and the measurement results are closed to the simulation.
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出版历程
  • 收稿日期:  2002-07-04
  • 刊出日期:  2003-04-14

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