Volume 39 Issue 2
May  2017
Article Contents

ZHANG Yong, LIN Yuan-gen. 185 GHz Solid-State Circuits Frequency Doubler[J]. Journal of University of Electronic Science and Technology of China, 2010, 39(2): 232-235. doi: 10.3969/j.issn.1001-0548.2010.02.017
Citation: ZHANG Yong, LIN Yuan-gen. 185 GHz Solid-State Circuits Frequency Doubler[J]. Journal of University of Electronic Science and Technology of China, 2010, 39(2): 232-235. doi: 10.3969/j.issn.1001-0548.2010.02.017

185 GHz Solid-State Circuits Frequency Doubler

doi: 10.3969/j.issn.1001-0548.2010.02.017
  • Received Date: 2008-08-27
  • Rev Recd Date: 2009-04-05
  • Publish Date: 2010-04-15
  • In millimeter and sub-millimeter wave bands, the multiplying method using semiconductor devices has been playing an increasing important role in accessing solid state signal source. In this paper, the circuit topology is designed by using computer aided design (CAD) technology. The study mainly includs the analysis of impedance-frequency characteristics of diodes by harmonious balance method, the simulation of the best bias point of the circuit, and design of the input and output matching circuits. Finally, the whole passive 185 GHz doubler is simulated and optimized by the commercial software aglient advanced design system (ADS) and ansoft high frequency structure simulator (HFSS). The frequency doubler has been fabricated and measured. The measured results show that the 185 GHz signal is obtained successfully with a minimum loss of 16.8 dB and a maximum loss of 22 dB.
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185 GHz Solid-State Circuits Frequency Doubler

doi: 10.3969/j.issn.1001-0548.2010.02.017

Abstract: In millimeter and sub-millimeter wave bands, the multiplying method using semiconductor devices has been playing an increasing important role in accessing solid state signal source. In this paper, the circuit topology is designed by using computer aided design (CAD) technology. The study mainly includs the analysis of impedance-frequency characteristics of diodes by harmonious balance method, the simulation of the best bias point of the circuit, and design of the input and output matching circuits. Finally, the whole passive 185 GHz doubler is simulated and optimized by the commercial software aglient advanced design system (ADS) and ansoft high frequency structure simulator (HFSS). The frequency doubler has been fabricated and measured. The measured results show that the 185 GHz signal is obtained successfully with a minimum loss of 16.8 dB and a maximum loss of 22 dB.

ZHANG Yong, LIN Yuan-gen. 185 GHz Solid-State Circuits Frequency Doubler[J]. Journal of University of Electronic Science and Technology of China, 2010, 39(2): 232-235. doi: 10.3969/j.issn.1001-0548.2010.02.017
Citation: ZHANG Yong, LIN Yuan-gen. 185 GHz Solid-State Circuits Frequency Doubler[J]. Journal of University of Electronic Science and Technology of China, 2010, 39(2): 232-235. doi: 10.3969/j.issn.1001-0548.2010.02.017

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