一种抗辐射16位 25 MS/s 流水线ADC

A radiation hardened 16-Bit 25 MS/s pipeline ADC

  • 摘要: 设计了一款抗辐射16位25 MS/s流水线型模数转换器(ADC)。根据电容失配等因素确定了第一级4位的流水线结构,并设计了改进的自举开关来提高采样线性度。为了降低系统功耗,设计了一种开关电容动态偏置电路,通过减小放大器的平均电流来降低ADC的系统功耗。为了满足抗辐射的要求,针对电离总剂量效应和单粒子闩锁效应的机理,对电路进行抗辐射加固设计。该款抗辐射ADC在0.18 μm CMOS工艺上进行制造,转换器的芯片面积为2.5 mm2,经过辐射试验后,在采样率25 MHz、1.8 V电源电压和30.1 MHz正弦输入的条件下,ADC的信噪比(SNR)达到了76.7 dBFS,无杂散动态范围(SFDR)为95.1 dBFS,功耗为38.76 mW,抗辐射能力达到电离总剂量100 Krad(Si)和单粒子闩锁阈值75 MeV·cm2/mg,可满足空间环境的使用要求。

     

    Abstract: A radiation hardened 16-bit 25 MS/s pipeline analog-to-digital (ADC) is designed. The architecture of pipeline with 4-bit first stage has been determined based on the consideration of nonideality such as capacitor mismatch and so on, and a novel bootstrapped switch is designed to improve the linearity. A switched-capacitor dynamic bias is proposed to lower the power consumption of the ADC by reducing the average current of amplifier. To meet the requirement of radiation hardness, a radiation hardened reinforcement design of the circuit is implemented according to the mechanism of total ionizing dose and single-event latch-up. This radiation hardened ADC is fabricated in 0.18 μm CMOS process and has area of 2.5 mm2. After irradiation and with the 25 MHz sampling rate, 1.8 V power supply and 30.1 MHz sine input, the ADC achieves SNR (signal noise ratio) of 76.7 dBFS, SFDR (spurious-free dynamic range) of 95.1 dBFS, power consumption of 38.6 mW, while the ability of radiation hardness for total ionizing dose is 100 Krad(Si) and the threshold of single-event latch-up is 75 MeV•cm2/mg, which is suitable for space applications.

     

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