Abstract: A high stability and low noise CMOS ring voltage-controlled oscillator (VCO) is designed and analyzed based on the CSMC 0.5μm process. Replica-biased circuit technique is adopted to suppress the noise from VDD and substrate. The analysis shows that the VCO can achieve better linear voltage-frequency characteristic and lower phase noise: when VCO control voltage varies from 1 V to 3 V, the turning range changes from 100 MHz to 500 MHz, meanwhile the phase noise are ?50 dBc/Hz, ?75 dBc/Hz, ?98 dBc/Hz, and ?120 dBc/Hz at an offset of 1 kHz, 10 kHz, 100 kHz, and 1 MHz from oscillator centre frequency, respectively.