Abstract: Aimmig at determining the depth of asynchronous first-in first-out (FIFO) in very large scale integrated (VLSI) circuits and system on chip (SoC) a model of dynamic parameters based on the running-time attribute of the asynchronous FIFO is presented in this paper. This model contains FIFO saturation, writing reading rate and overflow/underflow rat through the function simulation. On the base of this model, the depth of asynchronous FIFO in system on chip (SoC) can be determined by analyzing the relationship between these dynamic parameters and the depth of FIFO through the function simulation. According to the typical example provided, using the presented method can effectively minimize the depth of FIFO and optimize the usage of resource.