185GHz固态二倍频器研究

185 GHz Solid-State Circuits Frequency Doubler

  • 摘要: 在毫米波及亚毫米波范围,通常采用半导体器件倍频方法获得固态源。该文首先建立了电路拓扑结构,采用CAD技术进行偶次倍频器的电路模型设计和仿真分析,主要工作包括利用非线性分析方法对二极管的阻抗—频率特性进行分析;最佳偏置点的仿真;输出阻抗匹配及输入阻抗匹配仿真;最后,通过ADS和HFSS等软件的联合仿真,设计出185GHz平衡式无源二倍频器。对该倍频器进行了加工测试,结果表明,在180GHz~190GHz,倍频损耗最小为16.8dB,最大为22dB。

     

    Abstract: In millimeter and sub-millimeter wave bands, the multiplying method using semiconductor devices has been playing an increasing important role in accessing solid state signal source. In this paper, the circuit topology is designed by using computer aided design (CAD) technology. The study mainly includs the analysis of impedance-frequency characteristics of diodes by harmonious balance method, the simulation of the best bias point of the circuit, and design of the input and output matching circuits. Finally, the whole passive 185 GHz doubler is simulated and optimized by the commercial software aglient advanced design system (ADS) and ansoft high frequency structure simulator (HFSS). The frequency doubler has been fabricated and measured. The measured results show that the 185 GHz signal is obtained successfully with a minimum loss of 16.8 dB and a maximum loss of 22 dB.

     

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