Abstract: It is important that the high speed sampling data must be downconverted fast in the study of the wideband digital receiver. Based on DFT filter banks, an efficient structure of wideband digital downconverter,which can realize the Digital Down Conversion(DDC) and sampling rate change (SRC) of wideband signal, and multiple signals can also be processed easily in parallel form,is presented in this paper. Using the single level multiplication and parallel form in this structure, the computational time and hardware source exhaustion can be reduced. Algorithm and its FPGA implement computer simulation confirm the effectiveness of this structure.