JIANG Shu-yan, LUO Yi, LUO Gang, XIE Yong-le. Analysis of Dynamic Supply Current Testing for Gate Oxide Shorts Circuit Level[J]. Journal of University of Electronic Science and Technology of China, 2010, 39(1): 61-64. DOI: 10.3969/j.issn.1001-0548.2010.01.015
Citation: JIANG Shu-yan, LUO Yi, LUO Gang, XIE Yong-le. Analysis of Dynamic Supply Current Testing for Gate Oxide Shorts Circuit Level[J]. Journal of University of Electronic Science and Technology of China, 2010, 39(1): 61-64. DOI: 10.3969/j.issn.1001-0548.2010.01.015

Analysis of Dynamic Supply Current Testing for Gate Oxide Shorts Circuit Level

  • Gate oxide short is one of the key issue to the reliability of integrated circuit (IC),it can result in parametric failure without any logic error.In this paper,the behavior of a CMOS NAND gate with this gate oxide shorts is investigated base on dynamic supply current (IDDT) testing in circuit level.Some appropriate test patterns are selected to simulate and analyze the dynamic supply current of the gate oxide short circuit in TSMC 0.18 μm technology without any logic fault.The simulate results demonstrate that it is possible to detect the defective devices by analyzing the IDDT on the power supply path.Compared with the voltage test,IDDT testing can detect the gate oxide shorts more effectively.
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