FPGA-Based Parallel Access Design for Applications of Voice Signal Processing

In order to realize real-time voice processing, a parallel access design based on FPGA is proposed. Low memory space is implemented by distributed CLBs while the high memory space is constructed by the embedded arrays on FPGA. The mapping from logical memory to physical memory is introduced. With the help of dynamical replacement algorithm, the frequently accessed memory block is mapped into low memory space. Our experiment results show that, the dynamic replacement algorithm keeps memory access performance in a suitable range.