YU Qing-dong, ZHOU Li, ZHU Yue, HU Zhe-kun, CHEN Jie. Design and Implementation of a Programmable Intra Prediction Architecture[J]. Journal of University of Electronic Science and Technology of China, 2012, 41(4): 605-610. DOI: 10.3969/j.issn.1001-0548.2012.04.025
Citation: YU Qing-dong, ZHOU Li, ZHU Yue, HU Zhe-kun, CHEN Jie. Design and Implementation of a Programmable Intra Prediction Architecture[J]. Journal of University of Electronic Science and Technology of China, 2012, 41(4): 605-610. DOI: 10.3969/j.issn.1001-0548.2012.04.025

Design and Implementation of a Programmable Intra Prediction Architecture

  • For low cost and low power portable mobile applications, a unique intra prediction architecture for H.264/AVC and AVS dual-mode decoder is proposed based on the idea of programmability. By analyzing the similarity of the data path of different prediction modes in H.264/AVC and AVS, a specific programmable core with customized 8 bit microcode set and efficient data path is implemented. It contains only one 16-bit accumulator and one 16-bit barrel shifter. Implementation results show that the total gates count is only about 6.3K under 0.18 μm process, and the circuit can process real-time H.264/AVC and AVS sequences at D1(720×480) 30 f/s at 35 MHz with only 0.53 mW power consumption at 1.8 V power supply.
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