Research on Synchronous-PWM-Based High Resolution A-D Conversion

It is difficult to elevate resolution higher for Synchronous Voltage-to-Frequency Converter (SVFC) since its phase modulation characteristic and the restrict of output frequency upper limit. There are some approaches to elevate its resolution higher, for example, taking the technique of integrating charge balancing and slope voltage integral. In this paper, a novel principle and implementation technology based on synchronous Pulse-Width-Modulation (SPWM) mode via dual comparators for integral is brought forward. Its basic principle is charge balancing enough within one period via integral between two reference levels, and the integral time can be fine adjusted by higher frequency synchronous clock. Moreover, charge balancing can be dynamicly adjusted within gate time by multi-periods synchronous measurement method. Verifying test indicates that its resolution is better than 5 digits, and linearity referenced to Method of Least Square better than 0.005%.