Dai Rui, Hu Gang, Li Yang. Hardware Implementation of the Scheduling Module in OBS Edge Node Receiver[J]. Journal of University of Electronic Science and Technology of China, 2004, 33(6): 690-693,705.
Citation: Dai Rui, Hu Gang, Li Yang. Hardware Implementation of the Scheduling Module in OBS Edge Node Receiver[J]. Journal of University of Electronic Science and Technology of China, 2004, 33(6): 690-693,705.

Hardware Implementation of the Scheduling Module in OBS Edge Node Receiver

  • In this paper, a hardware implementation scheme of the scheduling module in Optic burst switching(OBS) edge node receiver is presented. Input serial polling(ISP), which is based on virtual output queuing(VOQ) mechanism, is a kind of fair and high-performance algorithm for crossbar arbitrating. Focused on ISP, the design allows receiving, switching and Ethernet-assembling for 6 routs of 1 000M-OBS data with two high-speed FPGA chips. The 6 routs of data mentioned above are totally independent, and there exists communication between two FPGA chips.
  • loading

Catalog

    /

    DownLoad:  Full-Size Img  PowerPoint
    Return
    Return