Zhou Ji, Cheng Liang, Hu Gang. Implementing Burst Assembly in OBS Networks Edge Node[J]. Journal of University of Electronic Science and Technology of China, 2004, 33(6): 697-700.
Citation:
Zhou Ji, Cheng Liang, Hu Gang. Implementing Burst Assembly in OBS Networks Edge Node[J]. Journal of University of Electronic Science and Technology of China, 2004, 33(6): 697-700.
Zhou Ji, Cheng Liang, Hu Gang. Implementing Burst Assembly in OBS Networks Edge Node[J]. Journal of University of Electronic Science and Technology of China, 2004, 33(6): 697-700.
Citation:
Zhou Ji, Cheng Liang, Hu Gang. Implementing Burst Assembly in OBS Networks Edge Node[J]. Journal of University of Electronic Science and Technology of China, 2004, 33(6): 697-700.
Implementing Burst Assembly in OBS Networks Edge Node
How to assemble TCP/IP packets into data burst in OBS edge nodes is discussed. Min-burst-length-max-assembly-period algorithm is preferred and implemented on Xilinx® VirtexⅡ Pro FPGA. A state machine controls the assembly process. Sharing buffer memory is proposed to save memory resources. That is, the number of physical burst queues is less than that of burst types since the inputs is random.
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