Buffer Structure of Shared-Memory Switch
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Graphical Abstract
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Abstract
Shared-memory is a common structure of Ethernet switches. It can achieve the optimal throughput and delay performance. Furthermore, for a given loss rate, a shared-memory switch requires less buffers than other switches. This paper analyzes and summarizes the physical and data structure of shared-memory Ethernet switches according to existence shared-memory switch chips, and bring forward our new structure.
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