Yu Xiang, Xiong Guangze. Top-Down Design Method for SOC Chips[J]. Journal of University of Electronic Science and Technology of China, 2002, 31(6): 585-589.
Citation: Yu Xiang, Xiong Guangze. Top-Down Design Method for SOC Chips[J]. Journal of University of Electronic Science and Technology of China, 2002, 31(6): 585-589.

Top-Down Design Method for SOC Chips

  • Current trends of electronic technologies suggest that embedded systems will be implemented on monolithic silicon chips. These constraints are forcing fundamental changes in the way we design software and hardware in SOCs. This article describes a novel top-down ASIC system design methodology and related technologies. Finally, we present our experience with using top-down approaches to design the digital base band chip of GPRS mobile phone.
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