Design of PLL Frequency Synthesizer by the Method of Extreme Value Phase Margin
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Graphical Abstract
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Abstract
A passive loop filter scheme and the design method of the filter for current charge pump PLL frequency synthesizer chip are given in the paper. The method is known as the method of extreme value phase margin. Also, all design formula are proved. In fact, the PLL frequency synthesizer is 2 typeⅡ (3~4) order loop model. Using the method and formula above, a L-band synthesizer has been finished. It has satisfactory performance on phase noise, frequency jump speed and spur rejection.
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