Abstract: In practice of floorplan/placement of very large scale integration (VLSI) physical design, it is very critical to place some modules along the boundaries of the chip so that connections between inputs and outputs and among units in hierarchical design mode are shortened. Based on non-slicing representation single-sequence (SS), boundary constraints in VLSI layout design are solved. The packing sequence of a SS is proved to be the appearance sequence of integer, which represents module in a SS code. Further, a necessary and sufficient condition of a module to be placed on four boundaries (top, bottom, left, and right) in a SS code is proposed and proved.