Abstract: An implementation for a 1.2 GHz high-linearity quadrature output frequency synthesizer is presented in standard 0.18 μm RF CMOS technology. For achieving optimized phase-noise performance, a high-linearity and low-tuning-sensitivity LC voltage-controlled oscillator is employed. Based on low-switchingnoise source-coupled logic structure, a high-speed divider-by-2 circuit is realized to achieve quadrature local oscillating signal, and a high-speed 8/9 dual-modulus prescaler circuit is implemented. A digital controlled phase frequency detector and difference charge pump are also integrated in the frequency synthesizer. From the carrier frequency of 1.21 GHz, the phase noise of proposed frequency synthesizer is -99.1dBc/Hz and -123.48 dBc/Hz at 100 kHz and 1 MHz offset respectively. The range of output frequency is from 1.13 GHz to 1.33 GHz, the power dissipation is 20.4 mW from a 1.8 V power supply, and the area is (1.5×1.25) mm2.