Abstract: A novel design of multi-channel parallel differential binary phase shift keying (DBPSK) receiver based FFT is proposed in this paper. This receiver is capable of processing thousands of time-domain overlapped signals. Traditional receivers allocate digital down converter (DDC) for every channel, pre-existing methods mostly adapt the hardware architecture to enhance the hardware parallel processing capability without ideal resource utilization and implementation complexity. The new method takes advantages of high efficient FFT algorithm to implement multi-channel parallel DDC, and thus achieve ideal performances for DBPSK receiver application.